Pixel for CMOS Image Sensor Having a Select Shape for Low Pixel Crosstalk

ABSTRACT

A novel CMOS image unit pixel layout having a photodiode including an optically optimized square image sensing region. The square image sensing layout provides for reduced electrical and color crosstalk and improved modulation transfer function (MTF) between neighboring pixels of an array of pixels.

CROSS-REFERENCES TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No. 11/251,522, filed Oct. 13, 2005, which is a continuation of U.S. patent application Ser. No. 09/780,682, filed Feb. 8, 2001, which claims priority to U.S. Provisional Patent Application No. 60/182,044, filed Feb. 11, 2000, all of which are incorporated by reference herein in their entirety for all purposes.

BACKGROUND OF THE INVENTION

The present invention relates generally to image sensing technology. More specifically, the present invention relates to a CMOS image sensor having a novel layout that uses specially-matched microlenses.

Traditionally, imaging technology has been centered around charge coupled device (CCD) image sensors. However, recently, CMOS imaging technology has become increasingly the technology of choice. There are a variety of reasons for this progression. First, CCD imagers require specialized facilities, which are dedicated exclusively to the fabrication of CCDs. Second, CCD imagers consume a substantial amount of power, since they are essentially capacitive devices, which require external control signals and large clock swings to achieve acceptable charge transfer efficiencies. Third, CCD imagers require several support chips to operate the device, condition the image signal, perform post processing and generate standard video output. This need for additional support circuitry makes CCD systems complex. Finally, CCD systems require numerous power supplies, clock drivers and voltage regulators, which not only further increase the complexity of the design, but also demands the consumption of additional significant amounts of power.

By contrast, CMOS imagers are characterized by a less complex design. The more simple architecture translates into a reduction in engineering and production costs and a concomitant and substantial reduction in power consumption. With today's sub-micron CMOS fabrication processes, CMOS imagers have also become highly integrated. For example, an entire CMOS-based imaging system, such as a digital camera, can be fabricated on a single semiconductor chip. Additionally, unlike CCD imagers, CMOS imagers are amenable to fabrication in standard CMOS fabrication facilities. This adaptability significantly reduces plant overhead costs. For these reasons, CMOS imagers are swiftly becoming the imagers of choice.

An image sensor is comprised of an array of picture elements or “pixels.” A layout for an exemplary CMOS unit pixel 10 is shown in FIG. 1. Unit pixel 10 is comprised of a rectangular image sensing area 100, transfer transistor 102, floating node 104, reset transistor 106, drive transistor 108, select transistor 110 and output 112. Unit pixel 10 is powered by power supply VDD 114. Image sensing area 100 is made rectangular to maximize the “fill factor,” which is defined as the percentage of the unit pixel 10 area occupied by image sensing area 100. A typical fill factor for the arrangement of FIG. 1 is approximately 30%.

Referring now to FIG. 2, there is shown a plan view of a partial array of pixels 20, according to conventional CMOS image sensor devices. By positioning hemiscylindrically-shaped microlenses 203 over image sensing areas 200, the effective fill factor for the layout of FIG. 1 can be improved, as incident light 204 is focused more towards the center of rectangular image sensing areas 200 by microlenses 203. The percentage of each unit pixel 20 occupied by each image sensing area 200 does not, of course, change by employment of microlenses 203. Nevertheless, light capture is improved and the effective fill factor is increased. Use of hemiscylindrically-shaped microlenses 203 can increase the effective fill factor to approximately 75%.

Despite the improvement in effective fill factor using hemicylindrically-shaped microlenses, there are negative performance factors, which are attributable to use of rectangular-shaped image sensing areas and hemicylindrically-shaped microlenses.

First, referring to FIG. 2, whereas utilization of hemicylindrically-shaped microlenses 203 is effective at directing incident light 204 arriving at angles perpendicular to the major axes (major axes are in x-direction) of the lenses 203, the hemicylindrically-shaped microlenses 203 are not very effective at focusing incident light 204 arriving at angles non-perpendicular to, i.e. oblique to, the major axes of the hemicylindrically-shaped microlenses 203. This ineffectiveness further involves light that is scattered and/or reflected and which ultimately arrives at the lenses 203 at oblique angles.

The ineffectiveness of hemicylindrically-shaped microlenses 203 to focus incident light towards the center of the image sensing areas 200 is problematic due to the fact that neighboring rectangular-shaped image sensing areas are in close proximity in the x-direction See FIG. 2, where the horizontal spacing between neighboring pixels is shown to be approximately 0.8 μm. The close proximity results in random diffusion of photocharge generated outside the photodiode depletion regions. Photocharge that is generated outside the depletion region of a particular pixel is prone to capture by a neighboring pixel. When photocharge is unwantedly captured by an adjacent pixel, electrical crosstalk occurs resulting in a reduction in image sharpness.

There is another type of crosstalk that can be attributed to the close proximity of neighboring rectangular-shaped image sensing areas 200. This second type of crosstalk occurs between pixels of different colors and is referred to in the art as “color crosstalk.” Color crosstalk leads to color distortion and is caused by the fact that silicon-based photodiodes have a wavelength-dependent photon absorption response. In particular, color distortion can be significant for image arrays that use rectangular-shaped image sensing areas together with an RGB Bayer pattern color filter. In fact, a difference on the order of 10% in the response of G_(R) (green pixels adjacent red pixels) and G_(B) (green pixels adjacent blue pixels), under uniform illumination, is observed when rectangular-shaped image sensing areas are used. This difference in green pixel responsivity results in color distortion.

Finally, yet another problem that is observed when neighboring image sensing areas are too closely positioned, is a decrease in spatial resolution. In imaging systems, resolution is quantified in terms of a modulation transfer function (MTF). The lower the MTF, the less capable an imaging device is at picking up the fine detail and contrast in the object that is being imaged.

The above problems associated with use of rectangular-shaped image sensing areas 200 and hemicylindrically-shaped microlenses 203 are further discussed in a paper entitled An Improved Digital CMOS Imager, presented at the 1999 IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors on Jun. 10-12, 1999. This paper is hereby incorporated by reference.

Based on the foregoing deficiencies associated with currently available CMOS imagers, what is needed is a new CMOS imager characterized by low electrical and optical pixel-to-pixel crosstalk, high effective fill factor, and high MTF. The present invention fulfills these needs by providing a CMOS imager having a novel unit pixel layout using specially matched microlenses.

SUMMARY OF THE INVENTION

In a first aspect of the present invention, a CMOS pixel for use in a CMOS imager is provided, and, comprises a photodiode having a square-shaped image sensing area, a transfer transistor for delivering photogenerated charge to an output of the CMOS pixel, a reset transistor for initiating the photogeneration and collection process and a source follower for transferring the transferred charge to the pixel output.

Use of a square image sensing area increases the distance between image sensing areas of adjacent pixels. This leads to a reduction in electrical and color crosstalk and improves the modulation transfer function (MTF).

In a second aspect of the invention, hemispherically-shaped microlenses are positioned over the image sensing areas of each CMOS pixel, to increase the effective fill factor of each pixel.

In one embodiment of the present invention, an array of CMOS pixels is provided, each pixel comprising a square image sensing region such that the distance between image sensing regions of neighboring pixels is optimized to reduce crosstalk between the neighboring pixels.

In another embodiment of the present invention, a CMOS pixel for use in a CMOS imager, comprises: a. a photodiode having a substantially square-shaped image sensing area, an anode coupled to ground and a cathode; b. a transfer transistor having a drain coupled to the cathode of the photodiode, a gate controlled by a control signal, Tx, and a source coupled to a floating sensing node; c. a reset transistor having a drain coupled to VDD, a gate controlled by a control signal, Rx, and a source coupled to the floating sensing node; and d. a source follower coupled between the floating node and an output of the unit pixel, the source follower controlled by a select signal.

A better understanding of the nature and advantages of the present invention may be gained with reference to the detailed description below, the drawings and the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a layout view of a unit pixel for a typical CMOS image sensor;

FIG. 2 is a plan view of a partial array of pixels employing hemiscylindrically-shaped microlenses over image sensing areas;

FIG. 3 is a layout view of a unit pixel for a CMOS image sensor according to the present invention;

FIG. 4 is plan view of a partial array of pixels employing hemispherically-shaped microlenses over square image sensing areas according to the present invention; and

FIG. 5 is a schematic diagram of the unit pixel of FIG. 3 according to the present invention.

DESCRIPTION OF THE SPECIFIC EMBODIMENTS

Referring to FIG. 3, there is shown a layout view of a specific embodiment of a unit pixel 30 for a CMOS image sensor according to the present invention. Unit pixel 30 is comprised of a square-shaped image sensing area 300, transfer transistor 302, floating node 304, reset transistor 306, drive transistor 308, select transistor 310 and output 312. Unit pixel 30 is powered by power supply VDD 314.

Unlike the rectangular-shaped image sensing area 100 of the unit pixel 10 for the CMOS image sensor of FIG. 1, the image sensing area 300 of the embodiment of FIG. 3, is square-shaped. And, as shown in the exemplary embodiment of FIG. 4, the image sensing areas 400 for an array 40 of unit pixels 30, have an area of, for example, about 8×8 μm². The spacing between neighboring image sensing areas 400 is, for example, around 4 μm, which is an improvement in separation of approximately 3.2 μm compared to the spacing between neighboring pixels using rectangularly-shaped image sensing areas 200 of FIG. 2. It should be mentioned that the areas of image sensing area 400 and the dimension between neighboring image sensing areas 400 can be tailored to achieve a desired fill factor, desired degree of crosstalk reduction and degree of MTF improvement. Hence the dimensions provided for the embodiment in FIG. 4 should be viewed as exemplary and not absolutely limiting.

Given a common pixel area, the square-shaped image sensing area 300 of the present invention is characterized by a reduced fill factor compared to the rectangular-shaped image sensing area 100 of FIG. 1. Nevertheless, the reduced fill factor is acceptable since a greater separation between neighboring square-shaped image sensing areas 300 can be achieved in the x-direction, compared to the separation of rectangularly-shaped image sensing areas (compare FIG. 2 to FIG. 4). Hence, use of square-shaped image sensing areas 300 leads to reduced crosstalk between neighboring pixels and a higher MTF the image sensing array 40.

Additionally, as depicted in FIG. 4, the effective fill factor of unit pixel 30 can be improved by placing hemishperically-shaped lenses 402 over the square-shaped image sensing areas 400. One added benefit of using hemispherically-shaped microlenses 402 relates to the relative ease in manufacturing the hemispherically-shaped microlenses 402, compared to odd-shaped lenses like the hemicylindrically-shaped lenses used in the embodiment illustrated in FIG. 2. Compared to the hemispherically-shaped microlenses, odd-shaped lenses often incorporate manufacturing defects and exhibit poor optical capabilities.

Referring now to FIG. 5, there is shown an equivalent circuit schematic of the unit pixel 30 of FIG. 3 in accordance with the present invention. Unless otherwise indicated, for convenience the same reference numerals identifying the components of FIG. 3 will be used to describe the operational characteristics of equivalent circuit schematic 50 of unit pixel 30.

Proper pixel operation requires three separate control signals, Tx, Rx and Sx. These control signals are further described in Woodward Yang, et al., entitled An Integrated 800×600 CMOS Imaging System, ISSCC Dig. Tech. Papers, 1999, pp. 304-305, which is hereby incorporated by reference. Reset transistor 306 is implemented as a depletion mode transistor in order to permit floating node 304 to be reset to VDD 314 and to reduce Vt dependence of the reset voltage. During integration time, image sensing area 300 of photodiode 500 is isolated from floating node 304 by transfer transistor 302 and floating node 304 is reset to VDD 314 through reset transistor 306. After reset, reset transistor 306 is switched off to isolate floating node 304 and the initial floating node voltage of pixel 30 (reference count) is read. After completion of the integration period, transfer transistor 302 is toggled by control signal, Tx, which causes the transfer of collected electrons from photodiode 500 to floating node 304. Finally, the resulting change in voltage at floating node 304 (raw data count) is read. Transistors 502 and 504 function together as a source follower and current source 506 functions as a load.

In conclusion, the present invention provides a novel CMOS image sensor topology, characterized by low electrical and color crosstalk between adjacent pixels and higher MTF. While the above is a complete description of the preferred embodiment of the present invention, it is possible to use various alternatives, modifications and equivalents. Therefore, the scope of the present invention should be determined not with reference to the above description, but should, instead, be determined with reference to the appended claims, along with their full scope of equivalents. 

1. An array, comprising: a plurality of pixels, each pixel comprising: a substantially square image sensing region, wherein a first distance along a first axis is substantially the same as a second distance along a second axis that is orthogonal to the first axis, wherein the first and the second distances are distances between image sensing regions of neighboring pixels; and a substantially hemispherical microlens positioned over the image sensing region of each pixel.
 2. The array of claim 1, wherein the difference between the first and second distances is no more than 0.2 micrometer.
 3. The array of claim 1, wherein the position of the substantially hemispherical microlens is configured to increase an effective fill factor.
 4. The array of claim 1, wherein the pixel further comprises: a transfer transistor having a first source-drain region coupled to the image sensing region, a gate controlled by a first control signal and a second source-drain region coupled to a floating sensing node; a reset transistor having a third source-drain region coupled to a reset potential, a gate controlled by a second control signal and a fourth source-drain region coupled to the floating sensing node; and a source follower coupled between the floating sensing node and an output of the pixel, the source follower controlled by a select signal.
 5. The array of claim 4, wherein the transfer transistor, the reset transistor, and the source follower are positioned along at least two sides of the pixel.
 6. The array of claim 4, wherein the reset transistor is a depletion mode transistor.
 7. The array of claim 4, wherein the source follower comprises: a first transistor having a first source-drain region coupled to a voltage supply, a gate coupled to the floating sensing node, and a second source-drain region coupled to a first source-drain region of a second transistor; and the second transistor having a second source-drain region coupled to the output of the pixel and a gate receiving the select signal.
 8. An array, comprising: a plurality of pixels, each pixel defining a substantially square area; a plurality of substantially square image sensing regions, each sensing region defined within a corresponding pixel; and a plurality of substantially hemispherical microlenses, each positioned over a corresponding square image sensing region.
 9. The array of claim 8, wherein the square image sensing region defines a first distance along a first axis and a second distance along a second axis that is orthogonal to the first axis, wherein the first distance is substantially the same as the second distance and the first and the second distances are distances between image sensing regions of neighboring pixels.
 10. The array of claim 9, wherein the difference between the first and second distance is no more than 0.2 micrometer.
 11. The array of claim 8, wherein the position of the substantially hemispherical microlens is configured to increase an effective fill factor.
 12. The array of claim 8, wherein the pixel further comprises: a transfer transistor having a first source-drain region coupled to the image sensing region, a gate controlled by a first control signal and a second source-drain region coupled to a floating sensing node; a reset transistor having a third source-drain region coupled to a reset potential, a gate controlled by a second control signal and a fourth source-drain region coupled to the floating sensing node; and a source follower coupled between the floating sensing node and an output of the pixel, the source follower controlled by a select signal.
 13. The array of claim 12, wherein the transfer transistor, the reset transistor, and the source follower are positioned along at least two sides of the pixel.
 14. The array of claim 12, wherein the reset transistor is a depletion mode transistor.
 15. The array of claim 12, wherein the source follower comprises: a first transistor having a first source-drain region coupled to a voltage supply, a gate coupled to the floating sensing node, and a second source-drain region coupled to a first source-drain region of a second transistor; and the second transistor having a second source-drain region coupled to the output of the pixel and a gate receiving the select signal. 